(Solved):   Question 5 ( 3 points) The dual-slope A/D converter shown below is using a 16 bit counter. ...

 

Question 5 ( 3 points) The dual-slope A/D converter shown below is using a 16 bit counter. You realized that the range of the input signal corresponds to counter values in the range [OXACE, \( 0] \) and the noise corresponds to a range of [0xEO, 0]. It is desired to simplify the A/D design by selecting a range of bits from the counter value \( X[15: 0] \). That means \( N \)-bit output are in the range [U:L] inclusively, where \( N=U-L+1 \) is the total number of bits of the \( A / D \) output, \( U \) is the upper bit of \( X \) included in the \( A / D \) output, \( L \) is the lower bit of \( X \) included in the \( A / D \) output value. (Hint: for this design to work the minimum value of the dynamic range used for resolution calculation must be a power of 2 , and must be less than or equal to the noise value - not to lose resolution) 1) The number of bits \( \mathrm{N} \) of the digital output = 2) The lower bit index \( L= \) 3) the Upper bit index \( U= \)