(Solved): In the following CMOS inverter logic gate, assume the transistor size of ((W)/(L))_(n)=0.8\mu (m)/(0 ...

In the following CMOS inverter logic gate, assume the transistor size of

and

and

. (a). Determine the operation modes (e.g. cut-off, linear or saturation) of the NMOS and PMOS transistors respectively at

, and 2.8 V . Using a table to list the operation modes is recommended. (Note: You may need to do multiple calculations for the data point

with

or 1.6 V ). (b). Using the tabulated results in (a) or otherwise, determine the current flowing through both the NMOS and PMOS transistors at the different input voltage

in (a). (c). Using Matlab or Excel, plot a graph of the current against the input voltage

. (d). Using the above results in (a) and (b) or otherwise, determine the output voltage

at the different input voltage

in (a). (e). Using Matlab or Excel, plot a graph of the voltage transfer characteristics (VTC) (i.e. output voltage

versus input voltage

) of the CMOS inverter with the five sets of data points obtained. It is given that the threshold voltage

and

for the NMOS transistor while

and

for the PMOS transistor. Assume the longchannel approximation of the MOSFET and there is no body effect (i.e. the body terminal of the MOSFETs are properly connected respectively to ground and

).