Home /
Expert Answers /
Electrical Engineering /
4-write-the-verilog-code-of-an-8-bit-up-down-counter-with-count-enable-and-reset-inputs-inputs-an-pa583
(Solved): 4. Write the Verilog code of an 8-bit up/down counter with count-enable and reset inputs Inputs an ...
4. Write the Verilog code of an 8-bit up/down counter with count-enable and reset inputs Inputs and outputs of the module are: asynchronous Count [7:0]: 8-bit counter output. Clk: Clock input triggering at rising edge. nReset: active-low (0 means reset) asynchronous reset input. count enable: 0=> stop, 1=> count. CntEn: UnD: count direction: 0=> count down, 1=> count up.
Expert Answer
I have used an extra variable tc to check the output reaches its maximum. all the variables are named as per the condition. module UpDownCounter(clk,enable,reset,mode,count,tc); input clk,cnten,nreset,und; output reg