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1) For the circuit in figure 1 (Select MOSFET, Ref.: Sedra) a) Using PSPICE (or Multisim) reproduce the results shown in figure 2, both with and without capacitor CS b) Analytically verify the results obtained through the simulation: the gains at mid frequencies using the gain formulas with and without CS c) Analytically verify the results obtained through the simulation: the upper and lower cutoff frequencies using the high and low-frequency model of the circuit with and without CS (first deduce expressions for calculating time constants and cutoff frequencies fL and fH, then use these expressions to verify simulations)

